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Bare Die Product Detail: SN74AUP2G00

NAND Gate:
Low-Power Dual 2-Input Positive-NAND Gate
Features:
  • Family:  AUP
  • Voltage(s) (Nom):  0.8, 1.2, 1.5, 1.8, 2.5, 3.3V
  • tpd @ Nom Voltage(s) :  31.8, 26.3, 16.6, 12.9, 8.8, 6.7ns
  • Output Drive IOL/IOH (Max):  4/-4mA
  • Features:  IOFF, low power consumption, low tpd
  • Logic:  True
Vendor:
Texas Instruments
  Electrical Datasheet

Die Physical Data:
Footprint: 0.237mm² (368mil²)
  Request Pad Layout
Product Families: Used for this device are tabulated below.
Functional:
  • Bits: 2
  • I/P Level: CMOS
  • O/P Level: CMOS
  • Schmitt Trigger: No
Specification:
VCC (Min): 0.80V
VCC (Max): 3.60V
fMIN @ VNOM: 100MHz
ICC (Max) @ VNOM: 0.0009mA
VNOM (Max): 3.3V
Output Drive (Max): 4mA
tpd (Max) @ VNOM: 6.7ns
Other Detail: Important information for this device is tabulated below.
Traffic light setting for Minimum Order Quantity indicates the following:
  • Green:Available from stock or at low factory MOQ.
  • Amber: Available on factory order with MOQ.
  • Red: High factory MOQ may apply, please ask for details.
Traffic light setting for High Reliability indicates the following:
  • Green: This bare die is specified and tested for use in high reliability applications.
  • Amber: This bare die can meet higher reliability specifications with additional testing & qualification, please ask for details.
  • Red: This bare die is not specified or specifically designed for use in high reliability applications.
Traffic light setting for Space Grade indicates the following:
  • Green: This bare die is qualified for space applications or has space level qualification data, please ask for details.
  • Amber: This bare die can be specified for space applications with additional testing and qualification, please ask for details.
  • Red: Suitability of this bare die for space applications is unknown and requires further qualification, please ask for details.

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